The present invention relates to an image display apparatus which uses a multi-electron beam source having a plurality of electron emission elements in a matrix layout, and a fluorescent screen having R, G, and B phosphors corresponding to these electron emission elements, and its driving method.
In recent years, flat-panel type, large-screen display apparatuses have been studied and developed extensively. The present inventors have been studying flat-panel type, large-screen display apparatuses using cold cathodes as electron emission elements.
Conventionally, as electron emission elements, two different types of elements, i.e., thermionic cathode elements and cold cathode elements, are known. Of these elements, as cold cathode elements, for example, a field emission element (to be referred to as an FE type element hereinafter), a metal/insulating layer/metal emission element (to be referred to as an MIM type element hereinafter), and the like are known.
Surface conduction type emission elements include, for example, elements described in M. I. Elinson, Radio Eng. Electron Phys., 10, 1290 (1965) and other elements to be described later.
The surface conduction type emission element utilizes a phenomenon in that electron emission occurs when currents are flowed in a direction parallel to the surface of a small-area thin film formed on a substrate. As surface conduction type emission elements, in addition to the above-mentioned element using an SnO.sub.2 thin film by Elinson et al., an element using an Au thin film G. Dittmer: "Thin Solid Films", 9, 317 (1972)!, an element using an In.sub.2 O.sub.3 /SnO.sub.2 thin film M. Hartwell and C. G. Fondtad: "IEEE Trans. ED Conf.", 519 (1975)!, an element using a carbon thin film Hisashi Araki et al.: Vacuum, Vol. 26, No. 1, 22 (1983)!, and the like have been reported.
FIG. 18A is a plan view of the above-mentioned element by M. Hartwell et al, as a typical example of the element structure of such surface conduction type emission element. In FIG. 18A, reference numeral 3001 denotes a substrate; and 3004, a conductive thin film consisting of a metal oxide formed by sputtering. The conductive thin film 3004 is formed into an H-shaped flat pattern, as shown in FIG. 18A. An electron emission portion 3005 is formed by performing an energization process called energization forming (to be described later) on the conductive thin film 3004. The interval L in FIG. 18A is set to fall within the range from 0.5 to 1 mm!, and the width W is set to be 0.1 mm!. Note that FIG. 18A illustrates the electron emission portion 3005 as a rectangular portion formed at the center of the conductive thin film 3004 for the sake of illustrative convenience, but it does not necessarily faithfully express the position or shape of the actual electron emission portion.
In the above-mentioned surface conduction type emission elements such as the element by M. Hartwell et al., it is a common practice to form the electron emission portion 3005 by performing an energization process called energization forming on the conductive thin film 3004 before electron emission. More specifically, in the energization forming the electron emission portion 3005 is formed in an electrically high-resistance state in such a manner that the conductive thin film 3004 is locally destroyed, deformed, or denatured by applying a constant DC voltage or a DC voltage that increases at a very slow rate (e.g., about 1 V/min) across the two ends of the conductive thin film 3004. Note that a fissure is formed on a portion of the locally destroyed, deformed, or denatured conductive thin film. When an appropriate voltage is applied to the conductive thin film after the energization forming, electron emission occurs in the neighborhood of the fissure.
On the other hand, as the FE type elements, for example, an element by W. P. Dyke & W. W. Dolan, "Field emission", Advance in Electron Physics, 8, 89 (1956), an element by C. A. Spindt, "Physical properties of thin-film field emission cathodes with molybdenum cones", J. Appl. Phys., 47, 5248 (1976), and the like are known.
FIG. 18B is a sectional view of the above-mentioned element by C. A. Spindt et al., as an example of the typical element arrangement of the FE type element. Referring to FIG. 18B, reference numeral 3010 denotes a substrate; 3011, an emitter wiring layer or interconnect consisting of a conductive material; 3012, an emitter cone; 3013, an insulating layer; and 3014, a gate electrode. This element causes electron emission from the distal end portion of the emitter cone 3012 by applying an appropriate voltage across the emitter cone 3012 and the gate electrode 3014.
In another element arrangement of the FE type element, the emitter and the gate electrode are juxtaposed on the substrate to be nearly parallel to the substrate surface in place of the stacked structure shown in FIG. 18B.
As an example of the MIM type element, an element by C. A. Mead, "Operation of Tunnel-emission Devices, J. Appl. Phys., 32, 646 (1961), or the like is known. FIG. 19 shows a typical example of the element structure of the MIM type element. FIG. 19 is a sectional view. Referring to FIG. 19, reference numeral 3020 denotes a substrate; 3021, a metal lower electrode; 3022, a thin insulating layer having a thickness of about 100 .ANG.; and 3023, a metal upper electrode having a thickness of about 80 to 300 .ANG.. The MIM type element causes electron emission from the surface of the upper electrode 3023 upon application of an appropriate voltage across the upper and lower electrodes 3023 and 3021.
The above-mentioned cold cathode elements do not require any heaters since they can obtain electron emission at relatively low temperatures as compared to the thermionic cathode elements. Therefore, the cold cathode element has a simpler structure than the thermionic cathode element, and a very small element can be formed. Even when a large number of elements are arranged on a substrate at a high density, the problem of, e.g., melting of the substrate by heat hardly occurs. The thermionic cathode element has a low response speed since it operates upon heating of a heater, while the cold cathode element has a high response speed.
For these reasons, extensive studies have been made to explore effective applications of the cold cathode element. For example, since the surface conduction type emission element has a simplest structure and allows easiest fabrication among the cold cathode elements, a large number of elements can be formed over a large area. Hence, the method of driving an array of a large number of elements has been studied, as disclosed in Japanese Patent Laid-Open No. 64-31332 by the present applicant.
As for applications of the surface conduction type emission element, for example, image forming apparatuses such as an image display apparatus, an image recording apparatus, and the like, a charged beam source, and the like have been studied. In particular, as an application to the image display apparatus, as disclosed in U.S. Pat. No. 5,066,883 and Japanese Patent Laid-Open Nos. 2-257551 and 4-28137 by the present applicant, an image display apparatus which uses a combination of the surface conduction type emission element and a phosphor that emits light upon irradiation of an electron beam has been studied. The image display apparatus which uses a combination of the surface conduction type emission element and the phosphor is expected to have higher characteristics than conventional image display apparatuses. For example, the image display apparatus of this type is superior to liquid crystal display apparatuses that have become popular in recent years, since it is of spontaneous emission type and requires no backlight, and has a wide viewing angle.
The method of driving an array of a large number of FE type elements is disclosed in, e.g., U.S. Pat. No. 4,904,895 by the present applicant. As an example of an application of the FE type element to an image display apparatus, a flat-panel type display apparatus reported by R. Meyer et at. is known R. Meyer, "Recent Development on Microtips Display at LETI", Tech. Digest of 4th Int. Vacuum Microelectronics Conf., Nagahama, pp. 6-9 (1991)!.
Also, an example of application of an array of a large number of MIM type elements to an image display apparatus is disclosed in, e.g., Japanese Patent Laid-Open No. 3-55738 by the present applicant. As the conventional pixel layout of such image display apparatus, a stripe layout in which three, R, G, and B phosphors arranged in the horizontal direction constitute one pixel is popularly used. However, in this stripe layout, when each phosphor has a nearly square shape, as shown in FIG. 20A, a pixel as a set of R, G, and B is horizontally elongated, and the horizontal resolution is lowered. On the other hand, since phosphors of identical colors are arranged in the vertical direction, vertical stripes are conspicuous when an image is displayed.
In order to solve such problems, a checkerboard layout in which R:G:B phosphors are arranged in a checkerboard pattern at a ratio of 1:2:1 has been proposed. Since each pixel as a set of R, G, and B extends over a plurality of rows of a phosphor array of the display apparatus, and is not horizontally elongated unlike in the stripe layout, the horizontal resolution is higher than that in the stripe layout. Furthermore, since phosphors of identical colors are not arranged in the vertical direction, vertical stripes are not conspicuous.
On the other hand, paying attention to the fact that the spatial resolution of the sense of sight with respect to luminance is higher than that with respect to hue, a method of positively setting the total number of G picture elements that contribute greater to luminance to be larger than those of R and B in place of the checkerboard layout is adopted.
A conventional method of driving such display apparatus which must scan a plurality of signal lines to display one pixel which consist of R, G, G, B elements since each pixel extends over a plurality of rows of the display apparatus will be described below. A case will be exemplified below wherein an NTSC signal is displayed on a display apparatus having 240 phosphors in the vertical direction.times.480 phosphors in the horizontal direction. The number of lines per field of the NTSC signal is 262.5, and signal components for the central 240 lines of these lines are assumed to be extracted and displayed in this example.
(First Display Method)
As the first display method, a method of displaying the first-line data of an input signal to be displayed on the first row of a panel, the second-line data of the input signal on the second row of the panel, . . . , the n-th-line data of the input signal on the n-th row of the panel will be examined below. Since the phosphor layout of the panel is the checkerboard layout, each odd-numbered row of the panel includes only G and R phosphors but no B phosphors, and each even-numbered row of the panel includes only B and G phosphors but no R phosphors. Therefore, in this display method, B signals on the odd-numbered lines of the input signal and R signals on the even-numbered lines are not displayed, and information is lost. In order to solve this problem, a vertical LPF (low-pass filter) must be used.
(Second Display Method)
A display method of displaying data obtained by filtering the first- and second-line data of an input signal by the vertical LPF on the first and second rows of the panel, displaying data obtained by filtering the third- and fourth-line data of the input signal by the vertical LPF, on the third and fourth rows of the panel, . . . , displaying data obtained by filtering the n-th- and (n+1)-th-line data of the input signal by the vertical LPF on the n-th and (n+1)-th rows of the panel will be described below.
FIG. 21 is a block diagram of a circuit for driving this display apparatus, and FIG. 22 is a timing chart upon driving the apparatus. An explanation will be given with reference to FIG. 21. An NTSC signal s1 is color-separated into three primary colors R, G, and B by a decoder 2. These three primary color signals s3, s4, and s5 are filtered by a horizontal LPF, and are then A/D-converted into digital signals s7, s8, and s9 by an A/D converter 6. The signals s7, s8, and s9 for two lines are filtered by a vertical LPF 10. The filtered signals are re-arranged by a signal re-arranging circuit 11 to match the phosphor layout of the panel. For example, since this example assumes the checkerboard layout as the phosphor layout, only G and R phosphors appear on each odd-numbered row, and only B and G phosphors appear on each even-numbered row, as shown in FIG. 20B. Hence, the signal re-arranging circuit 11 extracts only G and R data from signals to be displayed on the even-numbered rows of the panel (signals output from the vertical LPF), and alternately arranges them. Also, the circuit 11 extracts only B and G data from signals to be displayed on the odd-numbered rows of the panel (signals output from the vertical LPF) and alternately arranges them. Then, the circuit 11 outputs these signals to a shift register 12. After 480 data in the horizontal direction are stored in the shift register, the shift register transfers these data to a 1-line memory 13.
These data held in the 1-line memory 13 are sent to a panel 16 in response to a 1-line reading clock s15 generated by a control pulse generator 14. In synchronism with this signal, a scanning signal is supplied from a scanning signal generator 17 to the panel 16, thus displaying an image.
An explanation will be given with reference to FIG. 22. An NTSC signal s1 is separated into three primary color signals by the decoder 2, and the separated signals are A/D-converted into signals s7, s8, and s9 by the A/D converter 6. The signals for two lines (by calculating the average of two lines) are filtered by the LPF 10 in the vertical direction, and the signal re-arranging circuit 11 re-arranges the signals in correspondence with the phosphor layout of the panel. The circuit 11 then sends signals to the shift register 12. After signals for one row are stored in the shift register 12, these signals are transferred to the 1-line memory 13 and are held. The held signals are supplied to the panel in response to a 1-line reading clock s15, and an image is displayed on the scanning line of the panel, which is synchronized with the clock. At this time, the signals filtered by the vertical LPF are displayed by the following method. That is, data obtained by filtering the first- and second-line data of an input signal by the vertical LPF are displayed on the first and second rows of the panel, data obtained by filtering the third- and fourth-line data of the input signal by the vertical LPF are displayed on the third and fourth rows of the panel, . . . , data obtained by filtering the n-th- and (n+1)-th-line data of the input signal by the vertical LPF are displayed on the n-th and (n+1)-th rows of the panel. In this manner, when signals filtered by the vertical LPF are displayed, image information can be prevented from being lost.
(Third Display Method)
A display method of displaying data obtained by filtering the first- and second-line data of an input signal by the vertical LPF on the first row of the panel, displaying data obtained by filtering the second- and third-line data of the input signal by the vertical LPF on the second row of the panel, . . . , displaying data obtained by filtering the n-th- and (n+1)-th-line data of the input signal by the vertical LPF on the n-th row of the panel will be described below.
The driving block diagram of this display method is the same as that in FIG. 21. FIG. 23 is a timing chart of this display method. The third and second display methods are substantially the same except for the following points. In the second display method, signals obtained by filtering the first- and second-line data of an input signal by the vertical LPF are displayed on the first and second rows of the panel. However, in the third display method, signals obtained by filtering the first- and second-line data of an input signal by the vertical LPF are displayed on the first row of the panel, and signals obtained by filtering the second- and third-line data of the input signal by the vertical LPF are displayed on the second row of the panel. In the second display method, signals obtained by filtering the third- and fourth-line data of an input signal by the vertical LPF are displayed on the third and fourth rows of the panel. On the other hand, in the third display method, signals obtained by filtering the third- and fourth-line data of an input signal by the vertical LPF are displayed on the third row of the panel, and signals obtained by filtering the fourth- and fifth-line data of the input signal by the vertical LPF are displayed on the fourth row of the panel. That is, in the second display method, signals obtained by filtering n- and (n+1)-th line data (n is an odd number) by the LPF are displayed on the n-th and (n+1)-th rows of the panel, while in the third display method, signals obtained by filtering n-th and (n+1)-th line data (n is a natural number) by the LPF are displayed on the n-th row of the panel, and signals obtained by filtering (n+1)-th and (n+2)-th line data by the LPF are displayed on the (n+1)-th row of the panel. In FIG. 23, the way of filtering by the vertical LPF 10 is different from that in the second display method. With this display method, image information can be prevented from being lost, and a higher vertical resolution than in the second display method can be obtained.
In the above-mentioned prior arts, the total number of G picture elements which contribute greater to luminance is set to be larger than those of R and B. In this way, natural white color emission cannot be obtained unless each G phosphor area is set to be smaller than those of R and B or the electron beam radiation energy to G is reduced.
Fabricating a fluorescent screen on which the phosphor areas vary in the individual picture elements may result in a complicate process of forming very small phosphors and may lower the yield when a high resolution is to be assured.
On the other hand, reducing electron beam radiation energy to G can be attained by an electrical means. For example, in the prior art shown in FIG. 21, the intensity ratio of a G signal of the decoded R, G, and B signals is set to be smaller than those of R and B signals, thus obtaining natural white color emission. More specifically, a means for adjusting the attenuation or amplification factor (gain) of an input section (not shown) of the A/D converter 6 need only be arranged. Of course, a means for changing the intensity ratio of A/D-converted R, G, and B signals may be used.
In the field of liquid crystal display apparatuses, an apparatus disclosed in U.S. Pat. No. 5,311,205 (Hamada et al.) is known.
Hamada et al. connect signal electrodes used for applying a modulation signal in units of colors upon arranging R, G, and B color picture elements in a checkerboard pattern. This apparatus has a merit of obviating the necessity of arranging color signal selection switches in units of signal electrodes. However, as a matter associated with the problems to be solved by the present invention (to be described later), in the apparatus by Hamada et al., it should be noted that scanning electrodes are constituted by common electrodes for R and B and common electrodes for B and G.
However, in the above-mentioned prior art, since the electron beam radiation energy to G is reduced to maintain white balance, the peak luminance of the entire display apparatus lowers. The luminance is one of the most important specifications in an image display apparatus, and is an element that has a large influence on the product price, arrangement, applications, and the like in some cases.
A decrease in luminance is caused by setting the electron emission energy per unit time during the selection period of G picture elements to be smaller than those of R and B picture elements.
In the above-mentioned prior arts, since R and G, and B and G are mixed on scanning electrodes, it is difficult to independently change the selection period of G picture elements and the selection period of R and B picture elements.